NetTimeLogic GmbH - PTP Transparent Clock

The PTP Transparent Clock (TC) from NetTimeLogic is a fully scalable implementation of a Peer-To-Peer, One-Step Transparent Clock according to IEEE1588. It contains a Peer-Delay message processors which answers and measures the Peer-Delay to its neighbors and an On-The-Fly-Modifier unit which corrects the residence time of PTP Event-Messages. Each port is individual and only some common counter is shared between the ports. The number of ports can be freely chosen according to the requirements.

All datasets and algorithms are implemented completely in HW.

Block Diagram

Features

• PTP Transparent Clock according to IEEE1588-2019/2008
• Intercepts path between MAC and PHY
• Support for n-Ports
• Support for Default Profile: Layer 2 (Ethernet) and Layer 3 (Ip) support
• Support for Power Profile: C37.238-2011 and C37.238-2017 including VLAN support
• Support for Utility Profile: including HSR and PRP tag handling
• Support for IEEE802.1AS-REV: including IEEE802.1CB tag handling
• One Step and Two Step support
• Peer to Peer (P2P) and End to End (E2E) delay measurement
• Full line speed
• AXI4 Light register set or static configuration
• Datasets according to IEEE1588
• MII/RMII/GMII/RGMII Interface support (optional AXI4 stream for interconnection to 3rd party cores)
• Optional Management Message support
• Optional Signaling Message support
• Timestamp resolution with 50 MHz system clock: 10ns, with high resolution clock 4ns

Licensing & Pricing

There are different licensing possibilities (more info here). All prices are in US Dollars without VAT, all prices are one-time fees, no royalties apply:

• Project Source Code:  7100$
• Site Source Code: 12800$ 

All prices are non-binding estimates – please use the contact form for definitive pricing and lead-time information.

Downloads

Evaluation binaries available for Terasic's SoCKit development board or as Modelsim(R) precompiled libraries => contact us for free access